The present invention relates to a turbo encoder and a turbo decoder for receiving coded data and decoding it while performing error correction and a radio base station provided with the turbo encoder and decoder.
In the next generation radio communication, communication is carried out using turbo coding in order to have the ability to withstand random and bust noises. In the turbo coding, a packet string (data series) X1 . . . Xn is generated by convolutionally coding data Xs and another packet string (data series) Y1 . . . Ym is generated by convolutionally coding data Ys which is changed in order in accordance with a predetermined rule described in “cdma 2000 High Rate Packet Data Air Interface Specification”, pages 9–43 to 9–44, 3GPP2, C.S0024 (Version 2.0) published on Oct. 27, 2000 (hereinafter referred to as reference 1). Communication is done by transmitting and receiving (coding/decoding) these packet strings. Conversion of the order or sequence of the data series is called interleave and inverse conversion is called de-interleave.
Reference 1 discloses a method for the interleave and its FIG. 9.2.1.3.4.2.3-1 depicts a method of generating addresses for write/read of a data series to/from a memory and a method of making correction or recalculation in order to perform interleave. For example, where the data length of a data series is N (bits) and the data length of the data series removed of tail bits is N′ (bits), a data series having a data length N′=250 can be interleaved by issuing sequential addresses of from 0 to 249 by means of a counter and sequentially writing the data series to the memory. In the reference 1, however, random read addresses for the memory are calculated pursuant to the rule in reference 1 through a special method in order to maintain the ability to withstand noises. According this calculation method, addresses such as 251, 254 and so on at which data do not exist on the memory are calculated and therefore, correction or recalculation is carried out in the reference 1.
Accordingly, when realizing the address generator, it is necessary to provide the address correction function so as to regenerate addresses for read from the memory. When the address regeneration process such as above is carried out, the process for address generation becomes complicated in structure and superfluous processing time is needed, thus increasing delay in processing in the turbo decoder.
Generally, when concretely constructing the address generator, with fulfillment of correction in mind, corrected read addresses are tabulated in advance and read addresses calculated in reference 1 and the table as above are consulted to provide correct read addresses. For example, a technique described in JP-A-2001-53624 (hereinafter referred to as reference 2) adopts a method of storing addresses for write/read of data of the interleaver/de-interleaver in a memory.